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GS81032A2T-138 Datasheet PDF - Giga Semiconductor

零件编号产品描述 (功能)生产厂家
GS81032A2T-138 32K x 32 1M Synchronous Burst SRAM GSI
Giga Semiconductor GSI
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GS81032A2T-138 Datasheet PDF : GS81032A2T-138 pdf   
GS81032AQ-133 image

Functional Description
Applications
The GS81032A is a 1,048,576-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM applications, ranging from DSP main store to networking chip set support.

Features
• FT pin for user-configurable flow through or pipeline operation
• Single Cycle Deselect (SCD) operation
• 3.3 V +10%/–5% core power supply
• 2.5 V or 3.3 V I/O supply
• LBO pin for Linear or Interleaved Burst mode
• Internal input resistors on mode pins allow floating mode pins
• Default to Interleaved Pipeline mode
• Byte Write (BW) and/or Global Write (GW) operation
• Common data inputs and data outputs
• Clock Control, registered, address, data, and control
• Internal self-timed write cycle
• Automatic power-down for portable applications
• JEDEC-standard 100-lead TQFP or QFP package

 

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