SL74LV573N 查看數據表（PDF） - System Logic Semiconductor

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SL74LV573N

OCTAL D-TYPE TRANSPARENT LATCH (3-State)

System Logic Semiconductor 

SL74LV573

OCTAL D-TYPE TRANSPARENT LATCH (3-State)

By pinning SL74LV573 are compatible with SL74HC573 and

SL74HCT573 series. Input voltage levels are compatible with

stadard CMOS levels.

• Output voltage levels are compatible with input levels of CMOS,

NMOS and TTL ICS

• Voltage supply range from 1.2 to 5.5 V

• LOW input current: 1.0 µÀ; 0.1 µÀ at Ò = 25 °Ñ

• Output current 8 mÀ

• Latch current: not less than150 mÀ at Ò = 125 °Ñ

• ESD acceptable value: not less than 2000 V as per HBM and

not less than 200 V as per MM

ORDERING INFORMATION

SL74LV573N Plastic DIP

SL74LV573D SOIC

TA = -40° to 125° C

for all packages

FUNCTION TABLE

Inputs

OE

LE

D

L

H

H

L

H

L

L

L

X

H

X

X

H -HIGH voltage level

L - LOW voltage level

X - don’t care

Z - High impedance state

Outputs

Q

H

L

no change

Z

PIN ASSIGNMENT

OE 1

D0 2

D1 3

D2 4

D3 5

D4 6

D5 7

D6 8

D7 9

GND 10

20 VCC

19 Q0

18 Q1

17 Q2

16 Q3

15 Q4

14 Q5

13 Q6

12 Q7

11 LE

SLS System Logic

Semiconductor

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