IN74HC10D 查看數據表（PDF） - Integral Corp.

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IN74HC10D

TRIPLE 3-INPUT NAND GATE High-Performance Silicon-Gate CMOS

Integral Corp. 

IN74HC10

AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)

VCC

Guaranteed Limit

Symbol

Parameter

V 25 °C ≤85°C ≤125° Unit

to

C

-55°C

tPLH, Maximum Propagation Delay, Input A,B 2.0 95

tPHL or C to Output Y (Figures 1 and 2)

4.5 19

6.0 16

120 145 ns

24

29

20

25

tTLH, tTHL Maximum Output Transition Time, Any 2.0 75

Output

4.5 15

95 110 ns

19

22

(Figures 1 and 2)

6.0 13

16

19

CIN Maximum Input Capacitance

- 10

10

10 pF

Power Dissipation Capacitance (Per Typical @25°C,VCC=5.0 V

Gate)

CPD Used to determine the no-load dynamic

25

pF

power

consumption:

PD=CPDVCC2f+ICCVCC

Figure 1. Switching Waveforms

Figure 2. Test Circuit

EXPANDED LOGIC DIAGRAM

(1/3 of the Device)

4

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