12.1.4
12.1.5
12.1.6
12.1.7
12.1.8
12.1.9
12.1.10
12.1.11
12.1.12
12.1.13
12.1.14
12.1.15
12.1.16
12.1.17
12.1.18
12.1.19
12.1.20
12.1.21
12.1.22
12.1.23
12.1.24
12.1.25
12.1.26
12.1.27
12.1.28
12.1.29
12.1.30
12.1.31
12.1.32
12.1.33
12.1.34
12.1.35
12.1.36
12.1.37
12.1.38
12.1.39
12.1.40
12.1.41
12.1.42
12.1.43
12.1.44
12.1.45
12.1.46
12.1.47
12.1.48
12.1.49
12.1.50
12.1.51
12.1.52
12.1.53
12.1.54
12.1.55
12.1.56
12.1.57
12.1.58
12.1.59
PVC – Port Virtual Channel Control Register .......................................... 362
PVS – Port Virtual Channel Status Register............................................ 362
V0CAP – Virtual Channel 0 Resource Capability Register ......................... 362
V0CTL – Virtual Channel 0 Resource Control Register ............................. 362
V0STS – Virtual Channel 0 Resource Status Register .............................. 363
V1CAP – Virtual Channel 1 Resource Capability Register ......................... 363
V1CTL – Virtual Channel 1 Resource Control Register ............................. 364
V1STS – Virtual Channel 1 Resource Status Register .............................. 364
PAT[0-F] – Port Arbitration Table Register............................................. 364
UES – Uncorrectable Error Status Register ............................................ 365
UEM – Uncorrectable Error Mask Register.............................................. 365
UEV – Uncorrectable Error Severity Register.......................................... 366
CES – Correctable Error Status Register ............................................... 366
CEM – Correctable Error Mask Register ................................................. 366
AECC – Advanced Error Capabilities and Control Register ........................ 367
RES – Root Error Status Register ......................................................... 367
ESID – Error Source Identification Register ........................................... 367
RCTCL – Root Complex Topology Capabilities List Register ...................... 368
ESD – Element Self Description Register ............................................... 368
ULD – Upstream Link Descriptor Register .............................................. 368
ULBA – Upstream Link Base Address Register........................................ 368
RP0D – Root Port 0 Descriptor Register ................................................ 369
RP0BA – Root Port 0 Base Address Register .......................................... 369
RP1D – Root Port 1 Descriptor Register ................................................ 369
RP1BA – Root Port 1 Base Address Register .......................................... 370
RP2D – Root Port 2 Descriptor Register ................................................ 370
RP2BA – Root Port 2 Base Address Register .......................................... 370
RP3D – Root Port 3 Descriptor Register ................................................ 371
RP3BA – Root Port 3 Base Address Register .......................................... 371
AZD – High Definition Audio Descriptor Register .................................... 371
AZBA – High Definition Audio Base Address Register .............................. 372
ILCL – Internal Link Capabilities List Register ........................................ 372
LCAP – Link Capabilities Register ......................................................... 372
LCTL – Link Control Register ............................................................... 373
LSTS – Link Status Register ................................................................ 373
VPCAP – Private Virtual Channel Resource Capability Register.................. 373
VPCTL – Private Virtual Channel Resource Control Register...................... 374
VPSTS – Private Virtual Channel Resource Status Register ...................... 374
VPR – Private Virtual Channel Routing Register ...................................... 374
L3A – Level 3 Backbone Arbiter Configuration Register ........................... 375
L2A – Level 2 Backbone Arbiter Configuration Register ........................... 375
L1A – Level 1 Backbone Arbiter Configuration Register ........................... 376
DA – Downstream Arbiter Configuration Register ................................... 376
UNRL – Upstream Non-posted Request Limits Register ........................... 377
UMR – Upstream Minimum Reserved Register........................................ 378
QL – Queue Limits Register ................................................................. 378
GBC – Generic Backbone Configuration Register .................................... 379
RPC – Root Port Configuration Register................................................. 380
BAC – Bandwidth Allocation Configuration Register................................. 380
AS – Arbiter Status Register................................................................ 381
TRSR – Trap Status Register ............................................................... 381
TRCR – Trapped Cycle Register............................................................ 382
TWDR – Trapped Write Data Register ................................................... 382
IOTRn – I/O Trap Register (0-3) .......................................................... 382
TCTL – TCO Configuration Register ...................................................... 383
D31IP – Device 31 Interrupt Pin Register .............................................. 384
Intel® 631xESB/632xESB I/O Controller Hub Datasheet
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