TH58100FT 查看數據表（PDF） - Toshiba

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TH58100FT

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

Toshiba 

BLOCK DIAGRAM

I/O1

to

I/O8

CE

CLE

ALE

WE

RE

WP

RY/BY

I/O Control circuit

Logic control

RY/BY

Status register

Address register

Command register

Control

HV generator

TH58100FT

VCC VSS

Column buffer

Column decoder

Data register

Sense amp

Memory cell array

ABSOLUTE MAXIMUM RATINGS

SYMBOL

RATING

VCC

VIN

VI/O

PD

Tsolder

Tstg

Topr

Power Supply Voltage

Input Voltage

Input/Output Voltage

Power Dissipation

Soldering Temperature (10s)

Storage Temperature

Operating Temperature

VALUE

-0.6 to 4.6

-0.6 to 4.6

-0.6 V to VCC + 0.3 V (£ 4.6 V)

0.3

260

-55 to 150

0 to 70

CAPACITANCE *(Ta = 25°C, f = 1 MHz)

SYMB0L

PARAMETER

CONDITION

MIN

CIN

Input

VIN = 0 V

¾

COUT

Output

VOUT = 0 V

¾

* This parameter is periodically sampled and is not tested for every device.

MAX

20

20

UNIT

V

V

V

W

°C

°C

°C

UNIT

pF

pF

2001-03-05 2/43

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