M68AF127BL55MC1 查看數據表（PDF） - STMicroelectronics

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M68AF127BL55MC1

1Mbit (128K x8), 5V Asynchronous SRAM

STMicroelectronics 

Figure 9. Address Controlled, Read Mode AC Waveforms

A0-A16

DQ0-DQ7

tAVQV

tAVAV

VALID

DATA VALID

M68AF127B

tAXQX

AI05474

Note: E1 = Low, E2 = High, G = Low, W = High.

Figure 10. Chip Enable or Output Enable Controlled, Read Mode AC Waveforms

A0-A16

E1

tAVQV

tELQV

tAVAV

VALID

tAXQX

tEHQZ

E2

G

DQ0-DQ7

Note: Write Enable (W) = High.

tELQX

tGLQV

tGLQX

tGHQZ

VALID

AI05476

11/23

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