MWS5101 查看數據表（PDF） - Intersil

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MWS5101

256-Word x 4-Bit LSI Static RAM

Intersil 

MWS5101, MWS5101A

Data Retention Specifications at TA = 0oC to +70oC; See Figure 3

TEST

CONDITIONS

PARAMETER

SYMBOL

VDR

(V)

Minimum Data Retention Voltage

VDR

-

Data Retention Quiescent Current L2 Types

IDD

2

L3 Types

2

Chip Deselect to Data Retention Time

tCDR

-

Recovery to Normal Operation Time

tRC

-

VDD to VDR Rise and Fall Time

tR, tF

2

NOTE:

1. Typical Values are for TA = 25oC and nominal VDD.

VDD

(V)

-

-

-

5

5

5

LIMITS

ALL TYPES

(NOTE 1)

MIN

TYP

MAX

-

1.5

2

-

2

10

-

5

50

600

-

-

600

-

-

1

-

-

UNITS

V

µA

µA

ns

ns

µs

VDD

VDD

tCDR

CS2

VIH

VIL

DATA RETENTION

MODE

0.95 VDD

tF

VDR

0.95 VDD

tR

tRC

VIH

VIL

WRITE

ADDRESS

DECODER

READ

ADDRESS

DECODER

VSS

FIGURE 3. LOW VDD DATA RETENTION TIMING WAVEFORMS

VDD

FIGURE 4. MEMORY CELL CONFIGURATION

6-61

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