CDB4328 查看數據表（PDF） - Cirrus Logic

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CDB4328

18-Bit, Stereo D/A Converter for Digital Audio

Cirrus Logic 

CS4328

SWITCHING CHARACTERISTICS

(TA = 25 °C; VA+, VD+ = 5V ± 5%; VA- = -5V ± 5%; Inputs: Logic 0 = 0V, Logic 1 = VD+, CL = 20 pF)

Parameter

Symbol

Min

Typ

Max

Units

Master Clock Frequency using Internal Oscillator:

CKS=H

CKS=L

XTI/XTO

10.7

-

19.2

MHz

-

7.1

-

13.9

MHz

Master Clock Frequency using External Clock:

CKS=H

CKS=L

XTI/XTO 0.384

-

-

0.256

-

19.2

MHz

13.9

MHz

XTI/XTO Pulse Width Low

-

21

-

-

ns

XTI/XTO Pulse Width High

-

21

-

-

ns

BICK Pulse Width Low

BICK Pulse Width High

BICK Period

BICK rising to LRCK edge delay

BICK rising to LRCK edge setup time

SDATAI valid to BICK rising setup time

BICK rising to SDATAI hold time

RST Minimum Pulse Width Low

(Note 6)

(Note 6)

(Note 6)

(Note 6)

tbickl

30

-

tbickh

30

-

tbickw

80

-

tblrd

35

-

tblrs

35

-

tsbs

35

-

tbsh

35

-

2 periods of XTI/XTO

-

ns

-

ns

-

ns

-

ns

-

ns

-

ns

-

ns

Note: 6. "BICK rising" refers to modes 0, 1, and 3. For mode 2, replace "BICK rising" with "BICK falling."

LRCK

BICK

SDATAI

t blrd

t sbs

t blrs

tbickl tbickh

t bsh

Serial Input Timing (Modes 0, 1, &3)

LRCK

BICK

SDATAI

t blrd

t blrs

tbickl tbickh

t sbs

t bsh

MSB

MSB-1

Serial Input Timing (Mode 2)

4

DS62F3

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