HM62V256LFP-7SLT 查看數據表（PDF） - Hitachi -> Renesas Electronics
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HM62V256LFP-7SLT
Hitachi -> Renesas Electronics
HM62V256LFP-7SLT Datasheet PDF : 14 Pages
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HM62V256 Series
Block Diagram
(MSB) A12
A5
A7
A6
A8
A13
A14
A4
(LSB) A3
•
•
•
Memory Matrix
•
Row
•
•
Decoder •
512 × 512
•
•
•
V CC
V SS
I/O0
•
•
•
•
•
I/O7
CS
WE
OE
•
Column I/O
•
•
•
Input
•
Data
Column Decoder
•
Control
•
A2 A1 A0 A10 A9 A11
(LSB)
(MSB)
••
Timing Pulse Generator
Read/Write Control
•
•
•
•
•
•
•
4
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