HEF4753B 查看數據表（PDF） - Philips Electronics
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HEF4753B Datasheet PDF : 10 Pages
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Philips Semiconductors
Universal timer module
Product specification
HEF4753B
LSI
6. Frequency recognition mode (LFC = LOW; Y = HIGH; Z = HIGH)
The incoming signal must be symmetrical within the limits as given by the specified delay time in note 2., to achieve lower
or higher frequency detection (see Fig.8).
A B C D E F G H W X LFC Y Z
L H L H HHH H L L L H H
Minimum dividing number is 3.
Fig.8 Timing diagram for frequency recognition mode; tx = time shorter than t3 (OUT = H); ty = time greater than
t3 (OUT = L); for t1, t2 and t3 see Fig.5.
January 1995
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