IDT723611
Commercial Temperature Range
TIMING REQUIREMENTS OVER RECOMMENDED RANGES OF SUPPLY
VOLTAGE AND OPERATING FREE-AIR TEMPERATURES
Symbol
Parameter
IDT723611L15 IDT723611L20 IDT723611L30
Min. Max. Min. Max. Min. Max.
Unit
fS
Clock Frequency, CLKA or CLKB
–
66.7
–
50
–
33.4
MHz
tCLK
Clock Cycle Time, CLKA or CLKB
15
–
20
–
30
–
MHz
tCLKH Pulse Duration, CLKA or CLKB HIGH
6
–
8
–
12
–
ns
tCLKL Pulse Duration, CLKA or CLKB LOW
6
–
8
–
12
–
ns
tDS
tENS1
tENS2
tENS3
tPGS
tRSTS
tFSS
Setup Time, A0-A35 before CLKA↑ and B0-B35
before CLKB↑
CSA, W/RA, before CLKA↑; CSB, W/RB before
CLKB↑
ENA before CLKA↑; ENB before CLKB↑
MBA before CLKA↑; ENBbefore CLKB↑
Setup Time, ODD/EVEN and PGB before
CLKB↑(1)
Setup Time, RST LOW before CLKA↑
or CLKB↑(2)
Setup Time, FS0 and FS1 before RST HIGH
4
–
5
–
6
–
ns
6
–
6
–
7
–
ns
4
–
5
–
6
–
ns
4
–
5
–
6
–
ns
4
–
5
–
6
–
ns
5
–
6
–
7
–
ns
5
–
6
–
7
–
ns
tDH
Hold Time, A0-A35 after CLKA↑ and B0-B35
after CLKB↑
tENH1 CSA, W/RA after CLKA↑; CSB, W/RB
after CLKB↑
1
–
1
–
1
–
ns
1
–
1
–
1
–
ns
tENH2 ENA after CLKA↑; ENB after CLKB↑
1
1
1
ns
tENH3
tPGH
tRSTH
tFSH
MBA after CLKA↑; MBB after CLKB↑
Hold TIme, ODD/EVEN and PGB after CLKB↑(1)
Hold Time, RST LOW after CLKA↑ or CLKB↑(2)
Hold Time, FS0 and FS1 after RST HIGH
1
1
1
ns
0
–
0
–
0
–
ns
6
–
6
–
7
–
ns
4
–
4
–
4
–
ns
tSKEW1(3) Skew Time, between CLKA↑ and CLKB↑
for EF, FF
8
–
8
–
10
–
ns
tSKEW2(3) Skew Time, between CLKA↑ and CLKB↑
for AE, AF
14
–
16
–
20
–
ns
NOTES:
1. Only applies for a rising edge of CLKB that does a FIFO read.
2. Requirement to count the clock edge as one of at least four needed to reset a FIFO.
3. Skew time is not a timing constraint for proper device operation and is only included to illustrate the timing relationship between CLKA cycle and CLKB cycle.
8