¡ Semiconductor
MSM7540L/7560L
ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage
Analog Input Voltage
Digital Input Voltage
Storage Temperature
Symbol
VDD
VAIN
VDIN
TSTG
Condition
—
—
—
—
Rating
Unit
–0.3 to +5
V
–0.3 to VDD + 0.3
V
–0.3 to VDD + 0.3
V
–55 to +150
°C
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Condition
Min. Typ. Max. Unit
Power Supply Voltage
VDD Voltage must be fixed
2.7
—
3.6
V
Operating Temperature
Ta
—
–25
+25
+75 °C
Input High Voltage
MCK, XSYNC, RSYNC, PCMRI,
0.45
VIH PCMSI, BCLKA, BCLKB, IR,
LPS, PDN, RES
¥ VDD
—
VDD
V
Input Low Voltage
MCK, XSYNC, RSYNC, PCMRI,
VIL PCMSI, BCLKA, BCLKB, IR,
0
LPS, PDN, RES
0.16
—
V
¥ VDD
Master Clock Frequency
fMCK MCK
–0.01% 10.368 +0.01% MHz
Bit Clock Freqency
fBCKA BCLKA
fBCKB BCLKB
32
—
2048 kHz
64
—
2048 kHz
Synchronous Signal Frequency fSYMC XSYNC, RSYNC
—
8.0
— kHz
Clock Duty Ratio
DC MCK, BCLKA, BCLKB
30
50
70
%
MCK, XSYNC, RSYNC, PCMRI,
Digital Input Rise Time
tIr PCMSI, BCLKA, BCLKB, IR,
—
—
50
ns
LPS, PDN, RES
MCK, XSYNC, RSYNC, PCMRI,
Digital Input Fall Time
tIf PCMSI, BCLKA, BCLKB, IR,
—
—
50
ns
LPS, PDN, RES
Transmit Sync Signal Setting Time tXS
tXS
BCLKA, BCLKB to XSYNC
XSYNC to BCLKA, BCLKB
100
—
100
—
—
ns
—
ns
Receive Sync Signal Setting Time tRS BCLKA, BCLKB to RSYNC
tSR RSYNC to BCLKA, BCLKB
100
—
100
—
—
ns
—
ns
Synchronous Signal Width
tWS XSYNC, RSYNC
1 BCLK —
100 ms
PCM, ADPCM Set-up Time
tDS
—
100
—
—
ns
PCM, ADPCM Hold Time
tDH
—
100
—
—
ns
Digital Output Load
RDL IS (Pull-up Resistor)
CDL IS, PCMSO, PCMRO
500
—
—
W
—
—
100 pF
Bypass Capacitor for SG
CSG SG´GND
— 10+0.1 —
mF
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