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NJU6060 查看數據表(PDF) - Japan Radio Corporation

零件编号
产品描述 (功能)
比赛名单
NJU6060
JRC
Japan Radio Corporation  JRC
NJU6060 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
NJU6060
(3) Serial Interface
The NJU6060 interface with MPU by Serial Interface, control for LED.
CSb
CLK
SIO
* D7 D6 D5 D4 D3 D2 D1 D0 *
Note1) Data is not concerned with the signal of CSb but is read into the internal shift register by the rising edge of CLK.
Note2) The contents of a shift register are read into the internal instruction decoder by the rising edge of CSb.
note3) An instruction and data should surely input 8 bits. In case of entering over than 8 bits data, valid data is last 8 bits
data.
(4) Reset Circuit
Reset Circuit initializes the LSI to the following status by using of the more 1µs reset signal into the RES terminal
Reset status using the RES terminal
1, fPWM
2, OSC
0: (fosc/2)/32
0: Oscillation OFF
3, LED1 to 3
0: OFF
4, Phase
0,0: Same Phase
5, PWM data
0,0,0,0,0: 1/32
Ver.2004-04-16
-7-

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