STTS2002(2011) 查看數據表（PDF） - STMicroelectronics
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STTS2002 Datasheet PDF : 52 Pages
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Serial communications
STTS2002
Figure 1. Logic diagram
SDA(1)
SCL
A2
A1
A0
VDD
STTS2002
EVENT(1)
Note:
VSS
AI12261
1. SDA and EVENT are open drain.
Table 1.
Pin
Signal names
Symbol
Description
Direction
1
A0
Serial bus address selection pin. Can be tied to VSS or VDD. Input
2
A1
Serial bus address selection pin. Can be tied to VSS or VDD. Input
3
A2
Serial bus address selection pin. Can be tied to VSS or VDD. Input
4
VSS
Supply ground
5
SDA(1) Serial data
Input/output
6
SCL Serial clock
7
EVENT(1) Event output pin. Open drain and active-low.
Input
Output
8
VDD
Supply power (2.3 V to 3.6 V)
1. SDA and EVENT are open drain.
See Section 2.2: Pin descriptions on page 10 for details.
Figure 2. TDFN8 connections (top view)
A0 1
A1 2
A2 3
GND 4
8 VDD
7 EVENT(1)
6 SCL
5 SDA(1)
1. SDA and EVENT are open drain.
AI12262
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Doc ID 15389 Rev 5
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