TC58NVG0S3AFT05 查看數據表（PDF） - Toshiba

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TC58NVG0S3AFT05

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

Toshiba 

Auto Block Erase Timing Diagram

CLE

tCLS

tCS

CE

tCLH

tCLS

TC58NVG0S3AFT05

WE

ALE

tALS

tALH

tWB

tBERASE

RE

I/O1

to I/O8

RY / BY

tDS tDH

60h PA0 to 7 PA8 to 15

D0h

70h

Status

output

Auto Block

Erase Setup

command

Erase Start

command

Busy

Status Read

command

: VIH or VIL

: Do not input data while data is being output.

2003-08-20A 13/33

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