W83194R-630 查看數據表（PDF） - Winbond

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W83194R-630

166MHZ CLOCK FOR SIS CHIPSET

Winbond 

W83194R-630/-630A

8.2 SERIAL CONTROL REGISTERS

The Pin column lists the affected pin number and the @PowerUp column gives the state at true power

up. Registers are set to the values shown only on true power up. "Command Code" byte and "Byte

Count" byte must be sent following the acknowledge of the Address Byte. Although the data (bits) in

these two bytes are considered "don't care", they must be sent and will be acknowledge. After that,

the below described sequence (Register 0, Register 1, Register 2, ....) will be valid and acknowledged.

8.2.1 Frequency table by I2C

SSEL3

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

SSEL2

0

0

0

0

1

1

1

1

0

0

0

0

1

1

1

1

SSEL1

0

0

1

1

0

0

1

1

0

0

1

1

0

0

1

1

SSEL0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

CPU

(MHZ)

66.8

100.2

83.3

133.6

75

100.2

100.2

133.6

66.8

97

97

95.2

140

112

96.2

166

SDRAM

(MHZ)

100.2

100.2

83.3

100.2

75

133.6

150.3

133.6

66.8

97

129.3

95.2

140

112

96.2

166

PCI (MHZ)

33.4

33.4

33.2

33.4

37.5

33.4

33.4

33.4

33.4

32.3

32.3

31.7

35

37.3

32.1

33.3

REF (MHZ)

IOAPIC

14.318

14.318

14.318

14.318

14.318

14.318

14.318

14.318

14.318

14.318

14.318

14.318

14.318

14.318

14.318

14.318

Publication Release Date:May 13, 2005

-9-

Revision A1

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