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零件编号
产品描述 (功能)
CXB1582Q 查看數據表(PDF) - Sony Semiconductor
零件编号
产品描述 (功能)
比赛名单
CXB1582Q
Fibre Channel Receiver
Sony Semiconductor
CXB1582Q Datasheet PDF : 23 Pages
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CXB1582Q
Pin
No.
Symbol
Type
Typical pin
I/O voltage
V
CC
E
Equivalent circuit
V
CC
G
Description
43 SDIN
∗
44 SDIN
ECL
input
(differen
-tial)
ECL level
SDIN
SDIN
∗
V
EE
E
45,
58
V
CC
E
Power
supply
3.3V
—
V
CC
E
46 LBIN
∗
47 LBIN
ECL
input
(differen
-tial)
ECL level
LBIN
LBIN
∗
V
EE
E
V
CC
E
48 EXCLK
ECL
input
ECL level
EXCLK
V
EE
E
49 V
CC
P
Power
supply
3.3V
—
External
part
50 REXT
connec
—
-tion
pin
51 V
EE
P1
Power
supply
0V
52 V
EE
P2
Power
supply
0V
—
—
–7–
V
CC
E – 1.3V
Serial data inputs.
These input pins are
enabled when SHD
is set to low level.
V
EE
G
V
CC
G
Positive power
supplies for ECL I/O.
V
CC
E – 1.3V
Serial data inputs for
loop-back test.
These input pins are
enabled when LBEN
is set to high level.
V
EE
G
V
CC
G
V
CC
E – 1.3V
V
EE
G
External clock input.
When ECLKSEL
∗
is
set to low level, the
clock input to this pin
is used as the bit rate
clock. This pin is
biased to become
low level when left
open.
V
CC
P
REXT
V
EE
P2
Positive power supply
for internal PLL.
Connects the
resistor which
determines the VCO
center frequency.
Connect a 4.7k
Ω
resistor between this
pin and V
EE
P1. (See
Notes on Operation
and Fig. 1.)
Negative power
supply for internal
PLL.
Negative power
supply for internal
PLL.
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