HEF4511B 查看數據表（PDF） - NXP Semiconductors.
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HEF4511B Datasheet PDF : 20 Pages
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NXP Semiconductors
HEF4511B
BCD to 7-segment latch/decoder/driver
VI
LE input
VM
VSS
tW
VI
D2 input
VM
VSS
VOH
tsu
th
Qg output
VOL
001aae682
Fig 7.
The shaded area indicates where the input is permitted to change for predictable output performance.
Conditions: D3 = LOW and D0 = D1 = BL = LT = HIGH.
Measurement points are given in Table 10.
Waveforms showing minimum LE pulse width, set-up, and hold time for Dn to LE
HEF4511B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 11 November 2011
© NXP B.V. 2011. All rights reserved.
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