74VHC74 查看數據表（PDF） - Fairchild Semiconductor

零件编号

产品描述 (功能)

比赛名单

74VHC74

Dual D-Type Flip-Flop with Preset and Clear

Fairchild Semiconductor 

Logic Symbol

IEEE/IEC

Connection Diagram

Pin Descriptions

Pin Names

D1, D2

CK1, CK2

CLR1, CLR2

PR1, PR2

Q1, Q1, Q2, Q2

Description

Data Inputs

Clock Pulse Inputs

Direct Clear Inputs

Direct Preset Inputs

Output

Truth Table

Inputs

Outputs

Function

CLR PR D CK

Q

Q

LHXX

L

H

Clear

HL XX

H

L

Preset

L

H

H

H

L

H

H

H

X

L

H

X

X

H (Note 2) H (Note 2)

L

H

H

L

Qn

Qn

No Change

Note 2: This configuration is nonstable; that is, it will not persist when pre-

set and clear inputs return to their inactive (HIGH) state.

www.fairchildsemi.com

2

Share Link: