MC74HC393A 查看數據表（PDF） - ON Semiconductor
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MC74HC393A Datasheet PDF : 11 Pages
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MC74HC393A
TIMING REQUIREMENTS (Input tr = tf = 6 ns)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Symbol
Parameter
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ trec Minimum Recovery Time, Reset Inactive to Clock
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ (Figure 2)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tw
Minimum Pulse Width, Clock
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ (Figure 1)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tw
Minimum Pulse Width, Reset
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ (Figure 2)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tr,tf MaximumInputRiseandFallTimes
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ (Figure 1)
Guaranteed Limit
VCC
– 55 to
V
25_C v 85_C v 125_C Unit
2.0
25
30
40
ns
3.0
15
20
30
4.5
10
13
15
6.0
9
11
13
2.0
75
3.0
27
4.5
15
6.0
13
95
110
ns
32
36
19
22
15
19
2.0
75
3.0
27
4.5
15
6.0
13
95
110
ns
32
36
19
22
15
19
2.0
1000
1000
1000
ns
3.0
800
800
800
4.5
500
500
500
6.0
400
400
400
NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book
(DL129/D).
PIN DESCRIPTIONS
INPUTS
Clock (Pins 1, 13)
Clock input. The internal flip−flops are toggled and the
counter state advances on high−to−low transitions of the
clock input.
OUTPUTS
Q1, Q2, Q3, Q4 (Pins 3, 4, 5, 6, 8, 9, 10, 11)
Parallel binary outputs Q4 is the most significant bit.
CONTROL INPUTS
Reset (Pins 2, 12)
Active−high, asynchronous reset. A separate reset is
provided for each counter. A high at the Reset input prevents
counting and forces all four outputs low.
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