MT9125AE 查看數據表（PDF） - Zarlink Semiconductor Inc
零件编号
产品描述 (功能)
比赛名单
MT9125AE Datasheet PDF : 18 Pages
| |||
Preliminary Information
MT9125
AC Electrical Characteristics† - Serial PCM/ADPCM Interfaces (see Figures 12 & 13)
Voltages are with respect to ground (VSS) unless otherwise stated.
Characteristics
Sym
Min
Typ† Max Units
Test Conditions
1 Data Clock High
2 Data Clock Low
3 BCLK Period
4 Data Output Delay (excluding
first bit)
5 Output Active to High Z
6 Strobe Signal Setup
tCLH
160
ns CL=150pF
tCLL
160
ns CL=150pF
tBCL
400
7900 ns CL=150pF
60
ns CL=150pF
tDD
tAHZ
60
ns CL=150pF
tSSS
80
tBCL-
80
ns CL=150pF
7 Strobe Signal Hold
tSSH
80
tBCL-
80
ns CL=150pF
8 Strobe period relative to MCLK
(ENB1, ENB2, ENA)
512tC4P-
50
ns CL=150pF
9 Data Input Setup
10 Data Input Hold
11 Strobe to Data Delay (first bit)
12 F0i Setup
13 F0i Hold
14 MCLK (C4i) duty cycle
tDIS
tDIH
tSD
tF0iS
tF0iH
tH/tL
x100
50
ns CL=150pF
50
ns CL=150pF
60
ns CL=150pF
50
122 150
ns CL=150pF
50
122 150
ns CL=150pF
40
50
60
% CL=150pF
15 MCLK (C4i) period
tC4P
190
244.2 ns
16 Data Output delay
tDSToD
125
ns
17 Data in Hold time
tDSTiH
50
ns
18 Data in Setup time
tDSTiS
50
ns
† Timing is over recommended temperature & power supply voltages.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
CL=150pF
CL=150pF
CL=150pF
CL=150pF
8-85
Share Link: 