PD45128163G5-A10LI-9JF 查看數據表（PDF） - Elpida Memory, Inc

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PD45128163G5-A10LI-9JF

128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

Elpida Memory, Inc 

µPD45128441-I, 45128841-I, 45128163-I

7. Mode Register

BA0 BA1

(A13) (A12) A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

0 00 0 0 0 1

BA0 BA1

(A13) (A12) A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

xxxx100

LTMODE

WT

BL

BA0 BA1

(A13) (A12) A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

10

BA0 BA1

(A13) (A12) A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

x x x x x 1 1VVVVVVV

BA0 BA1

(A13) (A12) A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

0 00 0 0 0 0

LTMODE

WT

BL

JEDEC Standard Test Set (refresh counter test)

Burst Read and Single Write

(for Write Through Cache)

Use in future

Vender Specific

Mode Register Set

V = Valid

x = Don’t care

Burst length

Wrap type

Bits2-0

000

001

010

011

100

101

110

111

WT = 0

1

2

4

8

R

R

R

Full page

0 Sequential

1 Interleave

WT = 1

1

2

4

8

R

R

R

R

Latency

mode

Bits6-4

000

001

010

011

100

101

110

111

/CAS latency

R

R

2

3

R

R

R

R

Remark R : Reserved

Mode Register Set Timing

CLK

CKE

/CS

/RAS

/CAS

/WE

A0 - A11,

BA0(13), BA1(A12)

Mode Register Set

22

Preliminary Data Sheet E0233N10

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