NB100LVEP91MNG 数据手册 ( 数据表 ) - ON Semiconductor

3.3 V Triple LVPECL Input to ?3.3 V to ?5.0 V ECL Output Translator

3.3 V Triple LVPECL Input to -3.3 V to -5.0 V ECL Output Translator ( Rev : 2016 )

2.5 V/3.3 V Multilevel Input to Differential LVPECL/LVNECL 1:2 Clock or Data Fanout Buffer/Translator

2.5 V/3.3 VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer

2.5 V / 3.3 V, 161.1328MHz LVDS Clock Oscillator

2.5 V / 3.3 V, 187.5 MHz LVDS Clock Oscillator

1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR

3.3 V, 2.5 V Fixed 2-Output Voltage DC/DC Converter

-3.3 V / -5V?Triple ECL Input to PECL Output Translator ( Rev : 2016 )

3.3/2.5-V Phase-lock Loop Clock Driver