74ABT543CSC 查看數據表（PDF） - Fairchild Semiconductor

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74ABT543CSC

Octal Registered Transceiver with 3-STATE Outputs

Fairchild Semiconductor 

Functional Description

The ABT543 contains two sets of D-type latches, with sep-

arate input and output controls for each. For data flow from

A to B, for example, the A to B Enable (CEAB) input must

be low in order to enter data from the A Port or take data

from the B Port as indicated in the Data I/O Control Table.

With CEAB low, a low signal on (LEAB) input makes the A

to B latches transparent; a subsequent low to high transi-

tion of the LEAB line puts the A latches in the storage

mode and their outputs no longer change with the A inputs.

With CEAB and OEAB both low, the B output buffers are

active and reflect the data present on the output of the A

latches. Control of data flow from B to A is similar, but using

the CEBA, LEBA and OEBA.

Logic Diagram

Data I/O Control Table

Inputs

CEAB LEAB OEAB

H

X

X

X

H

X

L

L

X

X

X

H

L

X

L

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

Latch Status

Latched

Latched

Transparent

—

—

Output Buffers

HIGH Z

—

—

HIGH Z

Driving

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