LC74760 查看數據表（PDF） - SANYO -> Panasonic

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LC74760

On-Screen Display IC

SANYO -> Panasonic 

LC74760, 74760M

Second byte

DA0 to DA7 Register name

State

Register content

Function

7

—

0

Second byte identification code

6

—

0

HP5

0

5

(MSB)

1

0

4

HP4

1

The horizontal display start position is given by

0

3

HP3

5

1

HS = Tc × ( Σ 2nHPn)

n=0

0

2

HP2

1

where Tc is the period of the OSCIN and OSCOUT oscillator in

operating mode.

0

1

HP1

1

HP0

0

0

(LSB)

1

Note: When the chip is reset by the RST pin, the register states (bits) are all cleared to 0.

Note

The six bits HP0 to HP5 specify the

vertical display start position.

The weight of the lsb is 1 x Tc.

5 COMMAND4: Display Control Setting Command 1

First byte

DA0 to DA7

7

6

5

4

3

2

1

0

Register name

—

—

—

—

RSTSYS

RAMERS

OSCSTP

RNDSEL

State

1

1

0

0

0

1

0

1

0

1

0

1

Register content

Function

The command 4 identification code:

sets display control parameters.

Resets all registers. (Clears all registers to 0.)

Erases display RAM. (Sets display RAM to 7F (hexadecimal).)

Continues crystal oscillator operation.

Stops the crystal oscillator.

Turns off rounding.

Turns on rounding.

Note

This reset occurs when the CS pin goes

low, and the reset state cleared when

the CS pin goes high.

The RAM erase function requires at

least 500 µs.

It is executed on DSPOFF.

Only valid with character display off if

external synchronization is used.

Only valid for double and triple size

characters.

No. 4453-9/14

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