ST49C107ACF14-04 查看數據表（PDF） - Exar Corporation
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ST49C107ACF14-04 Datasheet PDF : 8 Pages
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ST49C107A-04
Preliminary
EXTERNAL CLOCK CONNECTION
To minimize the noise pickup, it is recommended to
connect 0.047 (F capacitor to XTAL1, and keep the lead
length of the capacitor to XTAL1 to a minimum to reduce
noise susceptibility.
FREQUENCY SELECT CALCULATION
The ST49C107A-04 contains an analog phase locked
loop circuit with digital closed loop dividers and a final
output multiplexer to achieve the desired dividing ratios
for the clock output.
The accuracy of the frequencies produced by the
ST49C107A-04 depends on the input frequency and
divider ratios. The formula for calculating the exact output
frequency is as follows:
CLKOUT = CLKIN * Factor
For proper output frequency, the ST49C107A-04 can
accept a reference frequency from 5 - 32MHz with max
output frequency of 130MHz (2X – clock).
CLOCK OUTPUT TABLE FOR ST49C107A-04 (using
14.318 MHz input. All frequencies in MHz).
A3 A2 A1 A0 Factor
2X-
CLOCK
CLOCK
0 0 0 0 95/17 80.02
40.01
0 0 0 1 107/23 66.62
33.31
0 0 1 0 35/10 50.11
25.06
0 0 1 1 95/34 40.01
20.00
0 1 0 0 56/8 100.23
50.11
0 1 0 1 107/46 33.31
16.66
0 1 1 0 38/17 32.01
16.00
0 1 1 1 35/20 25.06
12.47
1 0 0 0 76/17 64.02
32.01
1001
2
2X-Input 1X-Input
1010
3
3X-Input 1.5X-Input
1011
8
8X-Input 4X-Input
1 1 0 0 1/2 0.5X-Input 0.25X-Input
1 1 0 1 1/4
0.25X-
Input
0.125X-
Input
1 1 1 0 109/13 120.00
60.00
1 1 1 1 118/13 129.96
64.98
1X–CLOCK
2X–CLOCK
CLOCK
BCLK
T1
T2
T3
T5
T4
T8
T7
Figure 2. Timing Diagram
Rev. P2.00
4
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