SL74HC163D 查看數據表（PDF） - System Logic Semiconductor
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SL74HC163D Datasheet PDF : 9 Pages
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SL74HC163
AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)
Symbol
Parameter
fmax Maximum Clock Frequency (Figures1,6)
tPLH
Maximum Propagation Delay Clock to Q
tPHL (Figures 1,6)
tPLH
Maximum Propagation Delay Enable T to Ripple
Carry Out
tPHL (Figures 2,6)
tPLH
Maximum Propagation Delay Clock to Ripple
tPHL Carry Out (Figures 1,6)
tTLH, tTHL Maximum Output Transition Time, Any Output,
(Figures 1 and 6)
CIN
Maximum Input Capacitance
VCC
Guaranteed Limit
V 25 °C to ≤85°C ≤125°C Unit
-55°C
2.0
6
5
4
MHz
4.5 30
24
20
6.0 35
28
24
2.0 120
160
200
ns
4.5 20
23
28
6.0 16
20
22
2.0 145
185
320
ns
4.5 22
25
30
6.0 18
20
23
2.0 110
150
190
ns
4.5 16
18
20
6.0 14
15
17
2.0 135
175
210
ns
4.5 18
20
22
6.0 15
16
20
2.0 120
160
200
ns
4.5 22
27
30
6.0 18
22
25
2.0 145
185
220
ns
4.5 22
28
35
6.0 20
24
28
2.0 75
95
110
ns
4.5 15
19
22
6.0 13
16
19
-
10
10
10
pF
Power Dissipation Capacitance (Per Gate)
CPD Used to determine the no-load dynamic power
consumption:
PD=CPDVCC2f+ICCVCC
Typical @25°C,VCC=5.0 V
30
pF
SLS
System Logic
Semiconductor
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