HS-82C55ARH(1995) 查看數據表（PDF） - Intersil
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HS-82C55ARH Datasheet PDF : 23 Pages
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HS-82C55ARH
Mode 0 Configurations (Continued)
CONTROL WORD #12
D7 D6 D5 D4 D3 D2 D1 D0
10011000
D7 - D0
8
A
4
C
4
8
B
PA7 - PA0
PC7 - PC4
PC3 - PC0
PB7 - PB0
CONTROL WORD #13
D7 D6 D5 D4 D3 D2 D1 D0
10011001
D7 - D0
8
A
4
C
4
8
B
PA7 - PA0
PC7 - PC4
PC3 - PC0
PB7 - PB0
CONTROL WORD #14
D7 D6 D5 D4 D3 D2 D1 D0
10011010
D7 - D0
8
A
4
C
4
8
B
PA7 - PA0
PC7 - PC4
PC3 - PC0
PB7 - PB0
CONTROL WORD #15
D7 D6 D5 D4 D3 D2 D1 D0
10011011
D7 - D0
8
A
4
C
4
8
B
PA7 - PA0
PC7 - PC4
PC3 - PC0
PB7 - PB0
Operating Modes
Mode 1 (Strobed Input/Output)
This functional configuration provides a means for transfer-
ring I/O data to or from a specified port in conjunction with
strobes or “handshaking” signals. In Mode 1, Port A and Port
B use the lines on Port C to generate or accept these “hand-
shaking” signals.
Mode 1 Basic Functional Definitions:
• Two Groups (Group A and Group B)
• Each group contains one 8-bit port and one 4-bit control/
data port.
• The 8-bit data port can be either input or output. Both
inputs and outputs are latched.
• The 4-bit port is used for control and status of the 8-bit
port.
Input Control Signal Definition
STB (Strobe Input)
A “low” on this input loads data into the input latch.
IBF (Input Buffer Full F/F)
A “high” on this output indicates that the data has been
loaded into the input latch; in essence, an acknowledgment.
IBF is set by STB input being low and is reset by the rising
edge of the RD input.
INTR (Interrupt Request)
A “high” on this output can be used to interrupt the CPU
when an input device is requesting service. INTR is set by
the rising edge of STB and reset by the falling edge of RD.
This procedure allows an input device to request service
from the CPU by simply strobing its data into the port.
INTE A
Controlled by Bit Set/Reset of PC4.
INTE B
Controlled by Bit Set/Reset of PC2.
MODE 1 (PORT A)
CONTROL WORD
MODE 1 (PORT B)
CONTROL WORD
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
1 0 1 1 1/0
1
11
PC6, 7
1 = INPUT
0 = OUTPUT
PA7 - PA0 8
PB7 - PB0 8
INTE
A PC4
PC5
STB
A
IBF
A
INTE
B PC2
PC1
RD
RD
PC3
INTR
PC0
A
2
PC6, 7
I/O
STB
B
IBF
B
INTR
B
FIGURE 15. MODE 1 INPUT
Spec Number 518060
986
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