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MITSUBISHI MICROCOMPUTERS
38C8 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Reset
Middle-speed mode (f(φ) = 0.5 MHz)
CM7 = 0 (4 MHz selected)
CM6 = 1 (Middle-speed)
CM5 = 0 (4 MHz oscillating)
CM4 = 0 (32 kHz stoped)
CM6
“1”
“0”
High-speed mode (f(φ) = 2 MHz)
CM7 = 0 (4 MHz selected)
CM6 = 0 (High-speed)
CM5 = 0 (4 MHz oscillating)
CM4 = 0 (32 kHz stoped)
“0”
CM“14” CM6“1”
“0”
“1”
C M“ 0 ”
CM
4
6
“1”
“0”
Middle-speed mode (f(φ) = 0.5 MHz)
CM7 = 0 (4 MHz selected)
CM6 = 1 (Middle-speed)
CM5 = 0 (4 MHz oscillating)
CM4 = 1 (32 kHz oscillating)
CM6
“1”
“0”
High-speed mode (f(φ) = 2 MHz)
CM7 = 0 (4 MHz selected)
CM6 = 0 (High-speed)
CM5 = 0 (4 MHz oscillating)
CM4 = 1 (32 kHz oscillating)
Low-speed mode (f(φ) = 16 kHz)
CM7 = 1 (32 kHz selected)
CM6 = 1 (Middle-speed)
CM5 = 0 (4 MHz oscillating)
CM4 = 1 (32 kHz oscillating)
CM6
“1”
“0”
Low-speed mode (f(φ) =16 kHz)
CM7 = 1 (32 kHz selected)
CM6 = 0 (High-speed)
CM5 = 0 (4 MHz oscillating)
b7
CM4 = 1 (32 kHz oscillating)
“0”
CM“15” CM“61”
“0”
Low-speed mode (f(φ) =16 kHz)
CM7 = 1 (32 kHz selected)
CM6 = 1 (Middle-speed)
CM5 = 1 (4 MHz stopped)
CM4 = 1 (32 kHz oscillating)
CM6
“1”
“1”
C M“ 0 ”
6
CM
5
“1”
“0”
Low-speed mode (f(φ) =16 kHz)
“0”
CM7 = 1 (32 kHz selected)
CM6 = 0 (High-speed)
CM5 = 1 (4 MHz stopped)
CM4 = 1 (32 kHz oscillating)
b4
CPU mode register
(CPUM : address 003B16)
CM4 : Sub-clock stop bit
0: Stopped
1: Oscillating
CM5 : Main clock (XIN–XOUT) stop bit
0: Oscillating
1: Stopped
CM6 : Main clock division ratio selection bit
0: f(XIN)/2 (high-speed mode)
1: f(XIN)/8 (middle-speed mode)
CM7 : Internal system clock selection bit
0: XIN–XOUT selected
(middle-/high-speed mode)
1: XCIN–XCOUT selected
(low-speed mode)
Notes 1 : Switch the mode by the allows shown between the mode blocks. (Do not switch between the mode directly without an allow.)
2 : The all modes can be switched to the stop mode or the wait mode and returned to the source mode when the stop mode or the wait mode is ended.
3 : Timer and LCD operate in the wait mode.
4 : When the stop mode is ended, a delay of approximately 1 ms occurs automatically by timer 1 and timer 2 in middle-/high-speed mode.
5 : When the stop mode is ended, a delay of approximately 0.25 s occurs automatically by timer 1 and timer 2 in low-speed mode.
6 : Wait until oscillation stabilizes after oscillating the main clock XIN before the switching from the low-speed mode to middle-/high-speed mode.
7 : The example assumes that 4 MHz is being applied to the XIN pin and 32 kHz to the XCIN pin. φ indicates the internal clock.
Fig. 39 State transitions of system clock
39