MX9691L 查看數據表（PDF） - Macronix International

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MX9691L

SINGLE CHIP SOLID STATE DISK CONTROLLER

Macronix International 

Symbol

No.

HOLD#

16

HLDA#

73

XF#/SCTRL#

74

Flash Memory Interface

Symbol

No.

FA19/CLE

12

FA18/ALE/

20

ICEMODE

FA17/EROM

21

P/N:PM0546

MX9691L

Type

I/O

(CMOS)

I/O

(CMOS)

O

(CMOS)

Description

In Free-run mode, this signal is input that is used as holding

DSP clock down and release bus. Bus hold will be internally

asserted also when upgrade mode enable. In ICE-debug

ging mode, this signal is output and asserted when upgrade

mode enable. This pin includes an pull-up resistor.

In Free-run mode, this signal is output that is used as ack to

HOLD# signal. This signal will be internally sent to PCMCIA/

ATA interface also when upgrade mode enable. In ICE-de

bugging mode, this signal is input and ack to HOLD# when

upgrade mode enable.

Sleep control, this pin can be directly asserted to low while

power down bit is set by DSP. This pin is connected to

external RC circuit. Default inactive (Logic High).

In ICE-debugging mode, this signal is used to reset DSP.

Type

O

(CMOS)

I/O

(CMOS)

I/O(CMOS)

Description

In linear mode, this signal is used as flash memory chip high

address line 19. In series mode, this signal is used as flash

memory chip command latch enable.

In linear mode, this signal is used as flash memory chip high

address line 18. In series mode, this signal is used as flash

memory chip address latch enable. This signal is also used

to select whether the MX9691 initializes in Free-run mode

or in ICE-debugging mode at power-on reset. If this pin go

high, then the MX9691L will switch to Free-run mode at

power-on reset,and if this pin remains low, then the MX9691L

will initializes in ICE-debugging mode. This pin includes an

internal pull-up resistor.

ICE-debugging mode select :

ICEMODE=1 —> Free-run mode.

ICEMODE=0 —> ICE-debugging mode.

This signal is used as flash memory chip high address line

17. This signal is also used to select whether the firmware

store in linear type flash memory array or in separate

external ROM at power-on reset. If this pin go high, then the

firmware will be executed in linear type flash memory array,

and if this pin remains low, then the firmware will be executed

in separate external ROM.

Store firmware in external ROM or linear type Flash memory

array select:

EROM = 0 —> Store in External ROM.

EROM = 1 —> Store in flash memory array.

This pin includes an internal pull-up resistor.

REV. 1.1, JUL. 02, 1999

7

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