AD7723BSZ-REEL 查看數據表（PDF） - Analog Devices

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AD7723BSZ-REEL

0.3-7V; 16-bit, 1.2MSPS CMOS, sigma-delta ADC

Analog Devices 

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

AD7723

44 43 42 41 40 39 38 37 36 35 34

DGND/DB2 1

DGND/DB1 2

DGND/DB0 3

CFMT/RD 4

DGND/DRDY 5

DGND 6

MODE2 7

MODE1 8

AGND1 9

AGND1 10

AVDD1 11

PIN 1

IDENTIFIER

AD7723

TOP VIEW

(Not to Scale)

33 SCR/DB13

32 DGND/DB14

31 DGND/DB15

30 DVDD/CS

29 SYNC

28 DGND

27 STBY

26 AVDD

25 AGND

24 UNI

23 REF2

12 13 14 15 16 17 18 19 20 21 22

Figure 11. 44-Lead MQFP

Table 6. Pin Function Descriptions

Pin No. Mnemonic

Description

6, 28

DGND

Ground Reference for Digital Circuitry.

8, 7

MODE1/MODE2 Mode Control Inputs. The MODE1 and MODE2 pins choose either parallel or serial data interface operation

and select the operating mode for the digital filter in parallel mode. See Table 3 and Table 4.

9, 10

AGND1

Digital Logic Power Supply Ground for the Analog Modulator.

11

AVDD1

12

CLKIN

Digital Logic Power Supply Voltage for the Analog Modulator.

Clock Input. An external clock source can be applied directly to this pin with XTAL_OFF tied high.

Alternatively, a parallel resonant fundamental frequency crystal, in parallel with a 1 MΩ resistor, can

be connected betweenthe XTAL pin and the CLKIN pin with XTAL_OFF tied low. External capacitors

are then required from the CLKIN and XTAL pins to ground. Consult the crystal manufacturer’s

recommendation for the load capacitors.

13

XTAL

Input to Crystal Oscillator Amplifier. If an external clock is used, XTAL should be tied to AGND1.

14

XTAL_OFF

Oscillator Enable Input. A logic high disables the crystal oscillator amplifier to allow use of an external

clock source. Set low when using an external crystal between the CLKIN and XTAL pins.

15

HALF_PWR

When set high, the power dissipation is reduced by approximately one-half, and a maximum CLKIN

frequency of 10 MHz applies.

16, 18, 25 AGND

Power Supply Ground for the Analog Modulator.

17, 26

19

AVDD

VIN(−)

Positive Power Supply Voltage for the Analog Modulator.

Negative Terminal of the Differential Analog Input.

20

VIN(+)

Positive Terminal of the Differential Analog Input.

21

REF1

Reference Output. REF1 connects through 3 kΩ to the output of the internal 2.5 V reference and to a buffer

amplifier that drives the Σ-∆ modulator.

22

AGND2

23

REF2

24

UNI

27

STBY

Power Supply Ground Return to the Reference Circuitry, REF2, of the Analog Modulator.

Reference Input. REF2 connects to the output of an internal buffer amplifier that drives the Σ-∆ modulator.

When REF2 is used as an input, REF1 must be connected to AGND to disable the internal buffer amplifier.

Analog Input Range Select Input. The UNI pin selects the analog input range for either bipolar or unipolar

operation. A logic high input selects unipolar operation and a logic low selects bipolar operation.

Standby Logic Input. A logic high sets the AD7723 into the power-down state.

Rev. C | Page 11 of 32

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