PM5945 查看數據表（PDF） - PMC-Sierra

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PM5945

SONET ATM PHYSICAL INTERFACE BOARD

PMC-Sierra 

S TANDARD PRODUCT

PMC-Sierra, Inc.

PM5945 SAPI

PMC-940106 ISSUE 3, May 16, 1994

SAPI DAUGHTERBOARD

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CY7B951

The Cypress SONET/SDH Serial Transceiver is an integrated SONET clock and

data recovery/clock synthesis device. The internal receive PLL recovers a 155.52

MHz clock from a incoming NRZ or NRZI data and re-times the data. The receive

PLL uses the reference clock (19.44 MHz) to provide a 155.52 MHz clock in the

absence of input data. The reference clock is also used to improve PLL lock time.

The differential input data is re-timed by the recovered clock and presented as the

PECL differential output data.

The transmit section of the SONET/SDH Serial Transceiver contains a PLL that

takes a reference clock and multiplies it by 8 to produce a 155.52 MHz PECL

differential output clock. The transmit PECL differential input pair are used to buffer

the transmit PECL output of the SUNI. This input can also be muxed into the receive

side PLL for clock and data recovery (used for diagnostic purposes).

Line Interface

The receive line interface consists of receive optics connected to a clock and data

recovery unit. To ensure that there is a clock in the absence of incoming light, the

signal detect (SD) output of the optics is used to select between the serial and

parallel mode of operation on the receive side of the SUNI device. In normal

operation (good incoming signal) the SUNI device is in the serial mode and accepts

clock and data from the high speed interface (RSER is high). In loss of signal

condition, the SUNI device is switched to the parallel mode and accepts data from

the PICLK and PIN[7:0] inputs. The POCLK is switched in to generate the 19.44

MHz PICLK. This technique also guarantees that the SUNI will generate a LOS

indication when the optics loses incoming light. This is done due to the CY7B951

not squelching the data in a loss of signal condition.

The transmit line interface consists of the SUNI PECL transmit outputs which are

buffered by the Cypress CY7B951 and then fed directly to the transmit optics.

Optical transceivers having a standard 9-pin duplex SC receptacle are used.

The SUNI is configured for bit serial operation. The 155.52 MHz transmit clock

source is synthesized by the CY7B951 from a 19.44 MHz oscillator. The receive

clock and data recovery is supplied by the Cypress CY7B951 device.

If the loop back select is enabled on the CY7B951 the transmit data is muxed in to

the receive PLL and the recovered clock and data are fed back to the SUNI device.

The SUNI can also be configured for loop time operation. When configured for loop

time operation, only the receive clock and data are required.

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