CXG1122EN 查看數據表（PDF） - Sony Semiconductor
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CXG1122EN Datasheet PDF : 6 Pages
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CXG1122EN
Application Note
Impedance Matching for Harmonic Minimization
This note outlines the method used to find the source impedance to present to a transmit port at the second
harmonic frequency (2fo) to reduce the second harmonic level at the antenna.
This should be carried out for a set of devices that represent the process variants. This way a compromise can
be found that suits all the variants.
The necessary equipment is shown immediately below.
Power Meter
Signal
Generator
B.P.F.
Fundamental, fo
Second Harmonic, 2fo
10dB
Coupler
Diplexer
Load Pull
Tuner
DC Block
D.U.T.
DC Block
Spectrum
Analyzer
The device should be mounted on a PCB with 50Ω tracks running from all the RF pins to SMA connectors on
the PCB edge (DUT). All the ports should be externally DC blocked and the unused ports should be terminated in
50Ω. All the measurements should be performed at the incident powers for which the harmonic levels are
specified in this document.
The 2nd harmonic level at the antenna port is measured using the spectrum analyzer and the vertical and
horizontal position of the load pull stub adjusted such that this level is minimized.
The device should then be removed from the board and an SMA connector mounted such that the source
impedance seen by the transmit port at 2fo can be measured using a VNA.
Measurements should be de-embedded to the end of the SMA center pin.
A network should then be designed to match the impedance of the low pass filter (LPF), which usually comes
in front of the device, to the 2fo source impedance that gives sufficiently reduced 2fo levels for all the devices
measured.
The network should be designed to maintain a good match and insertion loss at the fundamental frequency.
–5–
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