74F777 查看數據表（PDF） - Philips Electronics

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74F777

Triple bidirectional latched bus transceiver (3-State + open collector)

Philips Electronics 

Philips Semiconductors

Triple bidirectional latched bus transceiver (3–State +

Open Collector)

Product specification

74F777

FEATURES

• Latching transceiver

• High drive Open Collector output current with minimum output

swing

• Compatible with Test Mode (TM) bus specification

• Controlled output ramp

• Multiple package options

• Industrial temperature range available (–40°C to +85°C)

DESCRIPTION

The 74F777 is a triple bidirectional latched bus transceiver and is

intended to provide the electrical interface to a high performance

wired–OR bus. This bus has a loaded characteristics impedance

range of 20 to 50 ohms and is terminated on each end with a 30 to

40 ohm resistor.

The 74F777 is a triple bidirectional transceiver with Open Collector

B and 3–State A port output drivers. A latch function is provided for

the A port signals. The B port output driver is designed to sink

100mA from 2 volts to minimize crosstalk and ringing on the bus.

A separate output threshold clamp voltage (VX) is provided to

prevent the A port output High level from exceeding future high

density processor supply voltage levels. For 5 volt systems, VX is

simply tied to VCC.

TYPE

74F777

TYPICAL

PROPAGATION DELAY

7.0ns

TYPICAL SUPPLY CUR-

RENT( TOTAL)

45mA

ORDERING INFORMATION

ORDER CODE

DESCRIPTION

COMMERCIAL RANGE

VCC = 5V ±10%, Tamb = 0°C to +70°C

INDUSTRIAL RANGE

VCC = 5V ±10%,

Tamb = –40°C to +85°C

20–pin plastic DIP (300 mil)

N74F777N

I74F777N

20–pin PLCC

N74F777A

I74F777A

PKG DWG #

SOT146-1

SOT380-1

INPUT AND OUTPUT LOADING AND FAN OUT TABLE

PINS

DESCRIPTION

A0 – A2

PNP latched inputs

B0 – B2

Data inputs with threshold circuitry

OEA0 – OEA2

A output enable inputs (active–High)

OEB0 – OEB2

B output enable inputs (active–Low)

LE0 – LE2

Latch enable inputs (active–Low)

A0 – A2

3–State outputs

B0 – B2

Open Collector outputs

Note to input and output loading and fan out table

One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.

OC = Open Collector.

74F (U.L.)

HIGH/LOW

3.5/0.117

5.0/0.167

1.0/0.033

1.0/0.033

1.0/0.033

150/40

OC/166.7

LOAD VALUE

HIGH/LOW

70µA/70µA

100µA/100µA

20µA/20µA

20µA/20µA

20µA/20µA

3mA/24mA

OC/100mA

May 19, 1992

2

853–1645 06772

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