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ST16C580IJ44 查看數據表(PDF) - Exar Corporation

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ST16C580IJ44 Datasheet PDF : 41 Pages
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ST16C580
SYMBOL DESCRIPTION
Symbol
RESET
VCC
XTAL1
XTAL2
-CD
-CTS
-DSR
-DTR
Rev. 1.20
Pin
Signal
40 44 48 type
Pin Description
35 39 35
I Reset. (active high) - A logic 1 on this pin will reset the internal
registers and all the outputs. The UART transmitter output
and the receiver input will be disabled during reset time. (See
ST16C580 External Reset Conditions for initialization de-
tails.)
40 44
42 Pwr Power Supply Input.
16 18 14
I Crystal or External Clock Input - Functions as a crystal input
or as an external clock input. A crystal can be connected
between this pin and XTAL2 to form an internal oscillator
circuit. An external 1 M resistor is required between the
XTAL1 and XTAL2 pins (see figure 9). Alternatively, an
external clock can be connected to this pin to provide
custom data rates (Programming Baud Rate Generator
section).
17
19
15
O Output of the Crystal Oscillator or Buffered Clock - (See also
XTAL1). Crystal oscillator output or buffered clock output.
38 42
40
I Carrier Detect (active low) - A logic 0 on this pin indicates
that a carrier has been detected by the modem.
36 40 38
I Clear to Send (active low) - A logic 0 on the -CTS pin
indicates the modem or data set is ready to accept transmit
data from the 580. Status can be tested by reading MSR bit-
4. This pin only affects the transmit and receive operations
when Auto CTS function is enabled via the Enhanced
Feature Register (EFR) bit-7, for hardware flow control
operation.
37 41 39
I Data Set Ready (active low) - A logic 0 on this pin indicates
the modem or data set is powered-on and is ready for data
exchange with the UART. This pin has no effect on the
UART’s transmit or receive operation.
33
37
33
O Data Terminal Ready (active low) - A logic 0 on this pin
indicates that the 580 is powered-on and ready. This pin can
be controlled via the modem control register. Writing a logic
1 to MCR bit-0 will set the -DTR output to logic 0, enabling
the modem. This pin will be a logic 1 after writing a logic 0
to MCR bit-0, or after a reset. This pin has no effect on the
6

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