Z90213 查看數據表（PDF） - Zilog

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产品描述 (功能)

比赛名单

Z90213

Z8 digital television controller. 12 Kbytes ROM, 237 bytes RAM, 20 I/O, 6 MHz

Zilog 

Z90219/213/212/211

Z8® Digital Television Controllers

BLOCK DIAGRAM

Zilog

XTAL1

XTAL2

/RESET

ADC0

ADC1

ADC2

ADC3

IRIN

P30

P31

P34

P35

PWM11

PWM1

PWM2

PWM3

PWM4

PWM5

PWM6

PWM7

PWM8

PWM9

PWM10

P1

P2

P3

P4

P5

P6

P7

Oscillator

WDT

RESET

Counter

Timer

Counter

Timer

3-bit

ADC

IR

Counter

Port3

PWM 11

(14-bit)

PWM 1

to

PWM 10

(6-bit)

8/12/16K Byte

Program ROM

Z8 CPU

Core

Register File

256 Byte

Character RAM

240 by 11-bit

& 10 by 8-bit

Output

Port

Character ROM

9K by 7-bit

P20

P21

P22

Port2

P23

P24

P25

P26

P27

P40

P41

Port4

P42

P43

P44

P45

P46

P47

I2C

Interface

SCLK0

SDATA0

SCLK1

SDATA1

Z9021x ONLY

On Screen

Display

OSDX1

OSDX2

HSync

VSync

R

G

B

VBlank

HLFTN

Z9021x ONLY

Figure 1. Functional Block Diagram

2

PRELIMINARY

CP96TEL2400

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