MAX1772EEI(2002) 查看數據表（PDF） - Maxim Integrated

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MAX1772EEI
(Rev.:2002)

Low-Cost, Multichemistry Battery Charger Building Block

Maxim Integrated 

Low-Cost, Multichemistry Battery-

Charger Building Block

Pin Description

PIN

NAME

FUNCTION

1

DCIN

Charging Voltage Input

2

LDO

Device Power Supply. Output of the 5.4V linear regulator supplied from DCIN. Bypass with a 1µF capacitor.

3

CLS

Source Current-Limit Input. Voltage input for setting the current limit of the input source.

4

REF

4.096V Voltage Reference. Bypass with 1µF to GND.

5

CCS

Input Current Regulation Loop Compensation Point. Use 0.01µF to GND.

6

CCI

Output Current Regulation Loop Compensation Point. Connect 0.01µF to GND.

7

CCV

Voltage Regulation Loop Compensation Point. Connect 1kΩ in series with 0.1µF to GND.

8, 9

GND

Analog Ground

ICHG is a scaled-down replica of the battery output current being sensed. It is used to monitor the

10

ICHG

charging current and indicates when the chip changes from voltage mode to current mode. The

transconductance of (CSIP - CSIN) to ICHG is 1µS. Connect ICHG pin to GND if it is unused.

11

ACIN

AC Detect Input. Detects when the AC adapter voltage is available for charging.

12

ACOK

AC Detect Output. Open-drain output is high when ACIN is less than REF/2.

13

REFIN

Reference Input. Allows the ICTL and VCTL pins to have ratiometric ranges for increased DAC

accuracy.

14

ICTL

Input for Setting Maximum Output Current. Range is REFIN/32 to REFIN. The device shuts down if

this pin is forced below REFIN/55 (typ).

15

VCTL

Input for Setting Maximum Output Voltage. Range is 0 to REFIN.

16

CELLS

Trilevel Input for Setting Number of Cells. GND = 2 cells, LDO/2 = 3 cells, LDO = 4 cells.

17

BATT

Battery Voltage Input

18

CSIN

Output Current-Sense Negative Input

19

CSIP

Output Current-Sense Positive Input. Connect a current-sense resistor from CSIP to CSIN.

20

PGND

Power Ground

21

DLO

Low-Side Power MOSFET Driver Output. Connect to low-side NMOS gate.

22

DLOV

Low-Side Driver Supply

23

LX

Power Connection for the High-Side Power MOSFET Driver. Connect to source of high-side NMOS.

24

DHI

High-Side Power MOSFET Driver Output. Connect to high-side NMOS gate.

25

BST

Power Connection for the High-Side Power MOSFET Driver. Connect a 0.1µF capacitor from LX to

BST.

26

CSSN

Input Current-Sense for Charger (negative input)

27

CSSP

Input Current-Sense for Charger (positive input). Connect a current-sense resistor from CSSP to

CSSN.

28

IINP

IINP is a scaled-down replica of the input current being sensed. It is used to monitor the total system

current. The transconductance of (CSSP - CSSN) to IINP is 1mS. Connect IINP pin to GND if it is unused.

10 ______________________________________________________________________________________

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