TLK3138 查看數據表（PDF） - Unspecified

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TLK3138

Dual XAUI Transceiver

Unspecified 

TLK3138

SLLS762A – FEBRUARY 2007 – REVISED APRIL 2007

Figure 8 shows the TLK3138 in a XGMII Loopback application.

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TLK3138

XGXS CORE A

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Figure 8. XGMII Loopback Application

It is possible to select non-conflicting modes of operation based on the following bits:

XAUI_RETIME (See Register Bit 4/5. 32907.2 for definition)

REDUNDANT_XAUI (See Register Bit 4/5.32907.6 for definition)

REDUNDANT_XGMII (See Register Bit 4/5.32907.7 for definition)

XGMII_LOOPBACK (See Register Bit 4/5.32792. 0 for definition (1 bit for each XGXS Core))

XAUI_LOOPBACK (See Register Bit 4/5.32792. 1 for definition (1 bit for each XGXS Core))

The TLK3138 supports the IEEE 802.3 defined Management Data Input/Output (MDIO) Interface to allow ease

in configuration and status monitoring of the link. The bi-directional data pin (MDIO) should be externally pulled

up to 1.2V or 2.5V per the standard for both MDIO0 and MDIO1.

The TLK3138 supports the IEEE 1149.1 defined JTAG test port for ease in board manufacturing test. It also

supports a comprehensive series of built-in tests for self-test purposes including PRBS generation and

verification, CRPAT, CJPAT, Mixed/High/Low Frequency testing.

The TLK3138 operates with a 1.2V core voltage supply, a 1.5V HSTL I/O voltage supply and a 2.5V bias supply.

The TLK3138 is packaged in a 23×23mm, 484-ball, 1mm ball pitch Plastic Ball Grid Array (PBGA) package and

is characterized for operation from 0°C to 70°C Ambient, 115°C Junction, and 5% power supply variation unless

noted otherwise. Note that the junction temperature must be kept below 115°C to meet TI C035 process

reliability.

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