K4S561632D 查看數據表（PDF） - Samsung

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K4S561632D

256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL

Samsung 

K4S561632D

Revision History

Revision 0.0 (Jan., 2002)

-First generation

Revision 0.1(Aug.,2002)

- ICC6 of Low power is changed from 1.0 to 1.5 due to typo.

CMOS SDRAM

Rev. 0.1 Aug. 2002

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