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3971 查看數據表(PDF) - Allegro MicroSystems

零件编号
产品描述 (功能)
比赛名单
3971
Allegro
Allegro MicroSystems Allegro
3971 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
3971
DUAL DMOS
FULL-BRIDGE DRIVER
ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 50 V, VDD = 5.0 V (unless otherwise noted).
Limits
Characteristic
Symbol Test Conditions
Min. Typ. Max. Units
Load Supply Voltage Range
Logic Supply Voltage Range
Load Supply Current
Logic Supply Current
Output Drivers
VBB
Operating
10
50
V
VDD
Operating
4.5 5.0 5.5
V
IBB
Operating, each supply, no load
3.0 mA
IDD
Operating
5.0 mA
Output Leakage Current
Output ON Resistance
Body Diode Forward Voltage
High-Side Gate Voltage
Control Logic
IDSS
rDS(on)
VF
VCP
VOUT = VBB
VOUT = 0 V
High-side switch, IOUT = -2.5 A
Low-side switch, IOUT = 2.5 A
Source diode, IF = 2.5 A
Sink diode, IF = 2.5 A
C = 0.22 µF, reference VBB
— <1.0 20
µA
— <-1.0 -20 mA
325 375 m
175 200 m
1.2
V
1.0
V
6.0 6.5 7.0
V
Logic Input Voltage
Logic Input Current
Propagation Delay Time
VIN(0)
VIN(1)
IIN(0)
IIN(1)
tPD
VIN = 0 V
VIN = 5.0 V
50% to 90%:
PWM change to source off
0.8
V
2.0
V
— <1.0 -5.0 µA
20
50
µA
50
ns
PWM change to sink off
60
ns
PWM change to source on
565
ns
PWM change to sink on
665
ns
Disable to source on
150
ns
Disable to sink on
250
ns
Thermal Shutdown Temperature
TJ
165
°C
Thermal Shutdown Hysteresis
TJ
15
°C
UVLO Threshold
VUVLO
Increasing VDD
3.9 4.15 4.4
V
UVLO Hysteresis
VUVLO
— 0.15 —
V
NOTES: 1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
www.allegromicro.com

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