AIC3842 查看數據表（PDF） - Analog Intergrations
零件编号
产品描述 (功能)
比赛名单
AIC3842 Datasheet PDF : 7 Pages
| |||
n APPLICATION INFORMATIONS
l Undervoltage Lockout
There are two separate undervoltage lockout
comparators incorporated to make sure that the IC
is fully functional before the output stage is
enabled. One is for power supply voltage (VCC)
and the other is for reference output voltage
(VREF). Each has a built in hysteresis to prevent
erratic output behavior when their respective
thresholds are crossed. For VCC comparator the
upper and lower thresholds are 16V and 10V,
respectively. For VREF compactor the upper and
lower threshold are 3.6V and 3.4V, respectively.
The large hysteresis and low start up current
(0.3mA) of the AIC3842 make it ideally suited in
off-line converter applications where efficient
bootstrap startup techniques are required. A 34V
zener is connected as a shunt regulator from VCC
to ground. Its purpose is to protect the IC from
excessive voltage that can occur during system
start-up.
Reference Output
The 5.0V reference output is trimmed to ±2.0%
tolerance at TA=25°C. It supplies charging current
to the oscillator timing capacitor and is capable of
providing current in excess of 20mA for powering
additional control system circuitry. In case of
overload, the reference is short-circuit protected at
about 85mA.
Error Amplifier
A fully compensated error amplifier is provided
with inverting input and output externally
accessible. The noninverting input is internally
biased at 2.5V. The converter output voltage is
usually divided down and connected to the
inverting input.
The output of the error amplifier is accessible for
external loop compensation, with an offset at two
diode drops (≅1.4V) and divided by three, before
connected to the inverting input of the current
sense comparator. This guarantees that no drive
pulse appears at the output (pin 6).
AIC3842
Oscillator
The oscillator frequency can be programmed
through the setting of timing components RT and
CT. Capacitor CT is charged from the 5.0V
reference output through RT to about 2.8V and
discharged to about 1.2V by the internal
discharge current. When CT is discharged the
output (pin 6) must be in the low state, thus
producing a controlled amount of output
deadtime. Note that many values of RT and CT
can produce the same frequency but only one
combination will yield a specific output deadtime
at a given frequency.
Current Sense Comparator and PWM
Latch
The output switch of AIC3842 is initiated by the
oscillator and terminated when the peak inductor
current reaches the threshold level established by
the error amplifier output (pin 1). The AIC3842 is
operated at a current mode since the inductor
current is monitored cycle-by-cycle and decides
the duty cycle.
The inductor current is converted to a voltage by
inserting the ground referenced sense resistor RS
in series with the source of output switch M1. This
voltage is monitored by the current sense input
(pin 3) and is compared to a level derived from the
error amplifier output. In the normal operating
conditions the peak inductor current is controlled
by the voltage at pin 1 where
IPK = V ( pin 1)− 1.4V
3RS
PWM Latch is used to ensure that only a single
pulse appears at the output during any given
oscillator cycle. However, a narrow spike on the
leading edge of the current waveform can usually
be observed and may cause the power supply to
exhibit an instability when the output is tightly
loaded.
Output Switch
The AIC3842 contains a single totem-pole output
stage that was specifically designed for direct
drive of power MOSFET. If any undervoltage
lockout is deetected, internal circuitry will keep the
output switch in a sinking current mode, no
external pull down resistor is needed.
6
Share Link: 