AV2722 查看數據表（PDF） - Unspecified

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AV2722

AUDIO CODEC WITH HEADPHONE DRIVER AND PROGRAMMABLE SAMPLE RATES

Unspecified 

AV2722 (Preliminary)

MASTER AND SLAVE MODE OPERATION - DIGITAL AUDIO INTERFACE

The AV2722 can be operated in either master or slave mode. By default, the chip is set to operate in “Slave” mode.

To configure the chip for “Master” mode operation, the programming bit MASTER (CREG6[7]) must be pro-

grammed to “1”. In master mode operation, AV2722 acts as a master which generates SC, SFAD, and SFDA. In

slave mode operation, AV2722 receives these signals from an audio DSP encoder/decoder source.

AV2722

SC

SFDA

SFAD

SDI

SDO

AUDIO

DSP

PROCESSOR

AV2722 in Master Mode

SFDA (PIN 4) OR

SFAD (PIN 6)

SC (PIN 2)

SDI (pin 3)

SDO (pin 5)

tmsdod

tmSU

tmHD

tmsfd

SDI audio data setup time

SDI audio data hold time

SFDA/SFAD propagation delay from SC

SDO propagation delay from SC

tmSU

tmHD

tmsfd

tmsdod

10 ns (min)

10 ns (min)

10 ns (max)

10 ns (max)

Audio Data Input Timing - MASTER MODE

6-29

January 22, 2004

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