CY2305 查看數據表（PDF） - Cypress Semiconductor
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CY2305 Datasheet PDF : 14 Pages
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CY2305
CY2309
Typical Duty Cycle[8] and IDD Trends[9] for CY2305-1 and CY2309-1
60
58
56
54
52
50
48
46
44
42
40
3
Duty Cycle Vs VDD
(for 30 pF Loads over Frequency - 3.3V, 25C)
3.1
3.2
3.3
3.4
3.5
3.6
VDD (V)
33 MHz
66 MHz
100 MHz
Duty Cycle Vs VDD
(for 15 pF Loads over Frequency - 3.3V, 25C)
60
58
56
54
52
50
48
46
44
42
40
3
33 MHz
66 MHz
100 MHz
133 MHz
3.1
3.2
3.3
3.4
3.5
3.6
VDD (V)
60
58
56
54
52
50
48
46
44
42
40
20
Duty Cycle Vs Frequency
(for 30 pF Loads over Temperature - 3.3V)
40
60
80
100
120
140
Frequency (MHz)
-40C
0C
25C
70C
85C
60
58
56
54
52
50
48
46
44
42
40
20
Duty Cycle Vs Frequency
(for 15 pF Loads over Temperature - 3.3V)
40
60
80
100
120
140
Frequency (MHz)
-40C
0C
25C
70C
85C
IDD vs Number of Loaded Outputs
(for 30 pF Loads over Frequency - 3.3V, 25C)
140
120
100
80
60
40
20
0
0
1
2
3
4
5
6
7
8
9
# of Loaded Outputs
33 MHz
66 MHz
100 MHz
IDD vs Number of Loaded Outputs
(for 15 pF Loads over Frequency - 3.3V, 25C)
140
120
100
80
60
40
20
0
0123456789
# of Loaded Outputs
33 MHz
66 MHz
100 MHz
Notes:
8. Duty Cycle is taken from typical chip measured at 1.4V.
9. IDD data is calculated from IDD = ICORE + nCVf, where ICORE is the unloaded current. (n = # of outputs; C = Capacitance load per output (F); V = Supply
Voltage (V); f = frequency (Hz)).
Document #: 38-07140 Rev. *G
Page 8 of 14
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