MAX11617 查看數據表（PDF） - Maxim Integrated
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MAX11617 Datasheet PDF : 24 Pages
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MAX11612–MAX11617
Low-Power, 4-/8-/12-Channel, I2C,
12-Bit ADCs in Ultra-Small Packages
Typical Operating Characteristics (continued)
(VDD = 3.3V (MAX11613/MAX11615/MAX11617), VDD = 5V (MAX11612/MAX11614/MAX11616), fSCL = 1.7MHz, (50% duty cycle),
fSAMPLE = 94.4ksps, single-ended, unipolar, TA = +25°C, unless otherwise noted.)
GAIN ERROR vs. TEMPERATURE
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
-40 -25 -10 5 20 35 50 65 80
TEMPERATURE (°C)
GAIN ERROR vs. SUPPLY VOLTAGE
2.0
1.6
1.2
0.8
0.4
0
-0.4
-0.8
-1.2
-1.6
-2.0
2.7 3.2 3.7 4.2 4.7 5.2 5.5
VDD (V)
Pin Description
MAX11612
MAX11613
µMAX WLP
1, 2, 3
A1, A2,
A3
—
—
—
—
4
A4
—
—
—
—
5
C4
6
C3
PIN
MAX11614
MAX11615
QSOP
MAX11615
WLP
MAX11616
MAX11617
QSOP
MAX11617
WLP
5, 6, 7 A1, A2, A3 5, 6, 7 A1, A2, A3
8–12
—
A4, B4, C4,
D4, B1
—
8–12
4, 3, 2
A4, B4, C4,
D4, C3
B3, B1, C2
—
—
—
—
1
B2
—
—
—
—
1
B2
13
D2
13
D2
14
D3
14
D3
NAME
FUNCTION
AIN0, AIN1,
AIN2
AIN3–AIN7
Analog Inputs
AIN8–AIN10
AIN3/REF
Analog Input 3/Reference Input or
Output. Selected in the setup register
(see Tables 1 and 6).
REF
Reference Input or Output. Selected in
the setup register (see Tables 1 and 6).
AIN11/REF
Analog Input 11/Reference Input or
Output. Selected in the setup register
(see Tables 1 and 6).
SCL
Clock Input
SDA
Data Input/Output
B1, B2,
7
B3, B4,
C2
15
B3, C2, C3,
D1
15
D1
GND
Ground
8
C1
16
C1
16
C1
VDD
Positive Supply. Bypass to GND with a
0.1µF capacitor.
—
—
2, 3, 4
—
—
—
N .C .
No connection. Not internally connected.
8
Maxim Integrated
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