MAX2235EUP 查看數據表（PDF） - Maxim Integrated
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MAX2235EUP Datasheet PDF : 8 Pages
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+3.6V, 1W Autoramping Power
Amplifier for 900MHz Applications
Typical Operating Characteristics (continued)
(MAX2235 Evaluation Kit, GC = unconnected, fRFIN = 836MHz, VCC = VSHDN = +3.6V, TA = +25°C, unless otherwise noted.)
RISE TIME vs. RAMPING CAPACITANCE
1400
1200
FULL POWER = +10dBm
1000 FULL POWER = +20dBm
800
600
400
FULL POWER = +30dBm
200
0
0 20 40 60 80 100 120
CAPACITANCE (nF)
FALL TIME vs. RAMPING CAPACITANCE
1200
FULL POWER = +30dBm
1000
800 FULL POWER = +10dBm
600
400
FULL POWER = +20dBm
200
0
0 20 40 60 80 100 120
CAPACITANCE (nF)
Pin Description
PIN
1
2
3
4
5
6, 7, 10
8
9
11
12
13, 14,
17, 18,
SLUG
15
16
19
20
NAME
RFIN
GND
VCC
VCC
VCC
GND
VCC
VCC
RAMP
REF
GND
RFOUT
RFOUT
SHDN
GC
FUNCTION
RF Input. A DC blocking capacitor in series with RFIN is required. The value of the capacitor depends on
the operating frequency.
GND connection for the input stage (variable-gain amplifier). Connect to the circuit board ground plane
with a separate low-inductance path (via).
Supply Voltage Input for the Input Stage. Bypass with its own 100pF low-inductance capacitor to GND.
Supply Voltage Input for Bias Circuitry. Bypass with its own 100pF low-inductance capacitor and a 1000pF
capacitor to GND, to minimize RF signal coupling into the bias circuits.
Supply Voltage Input for the Input Stage. Bypass with its own 22pF low-inductance capacitor to pins 6 and 7.
GND Connection for the Second-Stage Amplifier (driver). Connect to the circuit board ground plane with a
separate low-inductance path (via).
Supply Voltage Input for the Second Stage. Bypass with its own 220pF and 1000pF low-inductance
capacitors to GND.
Supply Voltage Input for the Second Stage. Connect to pin 8.
Power Ramp Pin. Connect a capacitor between RAMP and REF to provide a gradual linear power-up/down
ramp. See Detailed Description.
Reference Voltage for RAMP Capacitor. The reference is internally set to 1.9V.
GND Connection for the Power Stage. Solder the slug to the circuit board ground plane. Connect pins 13,
14, 17, and 18 to the slug with a straight board trace under the chip.
Power Amplifier Output. See Typical Operating Circuit for an example of a matching network, which pro-
vides optimal output power at 836MHz. Connect to pin 16.
Power Amplifier Output. Connect to pin 15.
Shutdown Pin. Drive SHDN low to turn the device off. Drive above 2.0V to turn the device on. Drive V SHDN
> 2.0V and VGC < 0.4V for standby mode.
Gain-Control Pin. Apply VGC between 0.6V and 2.3V to control the output power with a monotonic dB/V
relationship. See the Typical Operating Characteristics for a typical relationship.
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