MAX8737 查看數據表（PDF） - Maxim Integrated

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产品描述 (功能)

比赛名单

MAX8737

Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs

Maxim Integrated 

Dual, Low-Voltage Linear Regulator Controllers

with External MOSFETs

PIN

1

2

3

4

5

6

7

8

9

10

11

12, 14

13

15

16

—

Pin Description

NAME

VCC

CS1

OUT1

REFIN1

PGOOD2

PGOOD1

EN2

EN1

REFIN2

OUT2

CS2

N.C.

DRV2

GND

DRV1

EP

FUNCTION

Analog and Driver Supply Input. Connect to the system supply voltage (+5.0V). Bypass VCC to analog

ground with a 1µF or greater ceramic capacitor.

Positive Current-Sense Input for LDO1. To enable (foldback) current limit, connect CS1 to the positive

terminal of the current-sense element as shown in Figure 1. The MAX8737 driver reduces the gate

voltage when the 10mV (typ) current-limit threshold is exceeded. When CS1 is connected to VCC, the

MAX8737 disables the current-limit protection and enables the output undervoltage protection (see the

UVP Short-Circuit Protection section).

Output Feedback-Sense, Negative Current-Sense, and Discharge Input for LDO1. Connect directly to the

linear regulator output. When LDO1 is disabled, OUT1 is discharged through an internal 10Ω FET to GND.

External Reference Input for LDO1. REFIN1 sets the main output regulation voltage (VOUT1 = VREFIN1).

Open-Drain Power-Good Output for LDO2. PGOOD2 is low when the output voltage is more than 12%

(typ) below the normal regulation point, during soft-start, and in shutdown. Approximately 2ms (typ) after

OUT2 reaches the regulation voltage (REFIN2), PGOOD2 becomes high impedance as long as the

output remains in regulation.

Open-Drain Power-Good Output for LDO1. PGOOD1 is low when the output voltage is more than 12%

(typ) below the normal regulation point, during soft-start, and in shutdown. Approximately 2ms (typ) after

OUT1 reaches the regulation voltage (REFIN1), PGOOD1 becomes high impedance as long as the

output remains in regulation.

Enable Input for LDO2. Connect EN2 to Vcc for always ON. When EN2 is pulled low, the linear regulator

shuts down and pulls the output to ground.

Enable Input for LDO1. Connect EN1 to Vcc for always ON. When EN1 is pulled low, the linear regulator

shuts down and pulls the output to ground.

External Reference Input for the Secondary Regulator (LDO2). REFIN2 sets the main output regulation

voltage (VOUT2 = VREFIN2).

Output Sense, Negative Current-Sense Input, and Discharge Input for the Secondary Regulator (LDO2).

Connect directly to the linear regulator output. When the LDO2 is disabled, OUT2 is discharged through

an internal 10Ω FET to GND.

Positive Current-Sense Input for LDO2. To enable (foldback) current limit, connect CS2 to the positive

terminal of the current-sense element as shown in Figure 1. The MAX8737 driver reduces the gate

voltage when the 10mV (typ) current-limit threshold is exceeded. When CS2 is connected to VCC, the

MAX8737 disables the current-limit protection and enables the output undervoltage protection (see the

UVP Short-Circuit Protection section).

Not Internally Connected

External N-Channel Gate Drive for LDO2

Ground. Connect the thin QFN backside pad to GND.

External N-Channel Gate Drive for LDO1

Exposed Pad. Connect the thin QFN backside pad to GND.

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