MC10H145FN 查看數據表（PDF） - ON Semiconductor
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MC10H145FN Datasheet PDF : 5 Pages
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MC10H145
AC PARAMETERS
MC10H145
TA = 0 to +75°C,
VEE = −5.2 Vdc ±5%
Symbol
Characteristics
Min
Max
Unit
Conditions
tACS
tRCS
tAA
tW
tWSD
tWHD
tWSA
tWHA
tWSCS
tWHCS
tWS
tWR
tCSD
tCSW
tCSA
tCHD
tCHW
tCHA
tCS
tr, tf
Read Mode
Chip Select Access Time
Chip Select Recovery Time
Address Access Time
Write Mode
Write Pulse Width
Data Setup Time Prior to Write
Data Hold Time After Write
Address Setup Time Prior to Write
Address Hold Time After Write
Chip Select Setup Time Prior to Write
Chip Select Hold Time After Write
Write Disable Time
Write Recovery Time
Chip Enable Strobe Mode
Data Setup Prior to Chip Select
Write Enable Setup Prior to Chip Select
Address Setup Prior to Chip Select
Data Hold Time After Chip Select
Write Enable Hold Time After Chip Select
Address Hold Time After Chip Select
Chip Select Minimum Pulse Width
Rise and Fall Time
Address to Output
CS to Output
ns Measured from 50% of input to 50%
0
4.0
of output. See Note 2.
0
4.0
0
6.0
ns tWSA = 3.5 ns
6.0
−
Measured at 50% of input to 50% of
0
−
1.5
−
output. tW = 6.0 ns.
3.5
−
1.5
−
0
−
1.5
−
1.0
4.0
1.0
4.0
ns Guaranteed but not tested on
0
−
standard product. See Figure 1.
0
−
0
−
1.0
−
0
−
2.0
−
4.0
−
ns Measured between 20% and 80%
0.6
2.5
points.
0.6
2.5
Capacitance
Cin
Input Capacitance
Cout
Output Capacitance
pF Measured with a pulse technique.
−
6.0
−
8.0
NOTES:
1. Test circuit characteristics: RT = 50 Ω, MC10H145. CL p 5.0 pF (including jig and Stray Capacitance). Delay should be derated 30 ps/pF
for capacitive loads up to 50 pF.
2. The maximum Address Access Time is guaranteed to be the worst-case bit in the memory.
3. For proper use of MECL in a system environment, consult MECL System Design Handbook.
A
TCSD
DIN
TCSW
WE
TCSA
TCS
CS
TCHA
TCHD
TCHW
Figure 1. Chip Enable Strobe Mode
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