MX98745 查看數據表（PDF） - Macronix International
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MX98745 Datasheet PDF : 36 Pages
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MX98745
F. LED Display (Continued)
PAD # Name
I/O
83
LED2/
I/O,
TXMII
TTL
84
LED3/
I/O,
PHY0
TTL
85
LED4/
I/O,
PHY1
TTL
86
LED5/
I/O,
PHY2
TTL
87
LED6/
I/O,
PHY3
TTL
Description
LED 2/Port0 TX/MII mode Select. When Power on reset, value on this pin
will be latched at the rising edge of RESETL and be the value of TXMII which
can program the universal port (port 0) to TX mode (5B interface) or MII mode
(4B) interface. When TXMII is set to 1, Port 0 of XRC II will be programmed to
TX mode and PMSEL will be disabled. In normal operation (after power on
reset), this pin will display port 2's Receivee/Link, Partition, Isolation status
and indicates 30% Network utilization and 9% collision rate according to the
value on LDS[2:0]
LED 3/Physical Address 0. Value on LED3 will be latched at the rising edge of
RESET as the setting of Device physical address 0. If EECONF is set to 1,
PHY0 will be overwritten by the contents of EEPROM.
After EEPROM operation is completed (in case EECONF is set to 1), this pin
will display port 3's Receivee/Link, Partition, Isolation status and indicates 10%
Network utilization and 8% collision rate according to the value on LDS[2:0]
LED 4/Physical Address 1. Value on LED4 will be latched at the rising edge of
RESETL as the physical address 1 of MX98745. If EECONF is set, Physical
address will be overwritten by the value from EEPROM.
After EEPROM operation is completed, this pin will display port 4's Receivee/
Link, Partition, Isolation status and indicates 20% Network utilization and 10%
collision rate according to the value on LDS[2:0].
LED 5/Physical Address 2. Value on LED5 will be latched at the rising edge of
RESETL as the physical address 2 of MX98745. If EECONF is set, Physical
address will be overwritten by the value from EEPROM.
After EEPROM operation is completed, this pin will display port 5's Receivee/
Link, Partition, Isolation status and indicates 40% Network utilization and 13%
collision rate according to the value on LDS[2:0].
LED 6/Physical Address 3. Value on LED6 will be latched at the rising edge of
RESETL as the physical address 3 of MX98745. If EECONF is set, Physical
address will be overwritten by the value from EEPROM.
After EEPROM operation is completed, this pin will display port 6's Receivee/
Link, Partition, Isolation status and indicates 60% Network utilization and 15%
collision rate according to the value on LDS[2:0].
Table 5-1 Pin Description for XRC II (Continued)
P/N:PM0427
REV. 1.4, JUL. 8, 1998
9
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