RMLV0408EGSA-5S2 查看數據表（PDF） - Renesas Electronics

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RMLV0408EGSA-5S2

4Mb Advanced LPSRAM (512k word × 8bit)

Renesas Electronics 

RMLV0408E Series

Write Cycle (2) (WE# CLOCK, OE# Low Fixed)

A0~18

tWC

Valid address

CS#

WE#

OE#

OE# = “L” level VIL

I/O0~7

tAW

tAS

tCW

tWP *18,

tWR

tWHZ *19,20

tOW

*21

Valid Data

tDW

tDH

Preliminary

*21

Note

18. tWP is the interval between write start and write end.

A write starts when both of CS# and WE# become active.

A write is performed during the overlap of a low CS# and a low WE#.

A write ends when any of CS# or WE# becomes inactive.

19. tWHZ is defined as the time when the I/O pins enter a high-impedance state and are not referred to the I/O

levels.

20. This parameter is sampled and not 100% tested.

21. During this period, I/O pins are in the output state so input signals must not be applied to the I/O pins.

R10DS0217EJ0001 Rev.0.01

2013.09.10

Page 8 of 10

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