SC18IS600 查看數據表（PDF） - NXP Semiconductors.
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SC18IS600 Datasheet PDF : 30 Pages
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NXP Semiconductors
SC18IS600
SPI to I2C-bus interface
Table 14. Dynamic characteristics
VDD = 3.0 V to 3.6 V; Tamb = 40 C to +85 C (industrial); unless otherwise specified.[1]
Symbol Parameter
Conditions
Variable clock
Min
Max
fosc(RC)
internal RC oscillator
frequency
Glitch filter
SC18IS600;
nominal f = 7.3728 MHz;
trimmed to 1 % at
Tamb = 25 C
7.189
7.557
tgr
glitch rejection time
RESET pin
[2]
-
50
any pin except RESET
[2]
-
15
tsa
signal acceptance time
RESET pin
any pin except RESET
125
-
50
-
SPI slave interface
fSPI
TSPICYC
tSPILEAD
tSPILAG
tSCLKH
tSCLKL
tSPIDSU
tSPIDH
tSPIA
tSPIDIS
tSPIDV
SPI operating frequency
SPI cycle time
SPI enable lead time
SPI enable lag time
SCLK HIGH time
SCLK LOW time
SPI data set-up time
SPI data hold time
SPI access time
SPI disable time
SPI enable to output data
valid time
3.0 MHz
3.0 MHz
3.0 MHz
3.0 MHz
3.0 MHz
3.0 MHz
0
6⁄fosc
4
4
3⁄fosc
3⁄fosc
100
100
0
0
0
fosc⁄6
-
-
-
-
-
-
-
80
160
160
tSPIOH
tSPIR
SPI output data hold time
SPI rise time
SPI outputs
(SCLK, MOSI, MISO)
0
-
-
100
SPI inputs
(SCLK, MOSI, MISO, CS)
-
2000
tSPIF
SPI fall time
SPI outputs
(SCLK, MOSI, MISO)
-
100
SPI inputs
(SCLK, MOSI, MISO, CS)
-
2000
fosc = 18 MHz
Min Max
7.189 7.557
Unit
MHz
-
50 ns
-
15 ns
125
- ns
50
- ns
0
3 MHz
333
- ns
4
- s
4
- s
167
- ns
167
- ns
100
- ns
100
- ns
0
80 ns
-
160 ns
-
160 ns
0
- ns
-
100 ns
-
2000 ns
-
100 ns
-
2000 ns
[1] Parameters are valid over operating temperature range unless otherwise specified. Parts are tested to 2 MHz, but are guaranteed to
operate down to 0 Hz.
[2] SCL and SDA do not have glitch suppression circuits.
SC18IS600
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7.1 — 20 November 2017
© NXP Semiconductors N.V. 2017. All rights reserved.
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